40G QSFP to Four 10G SFP Copper Direct Attach Breakout Cable

QSFP AOC-end Pin DescriptionsPINLogicSymbolName/DescriptionNote1GNDGround12CML-ITx2nTransmitter Inverted Data Input3CML-ITx2pTransmitter Non-Inverted Data output4GNDGround15CML-ITx4nTransmitter Inverted Data Input6CML-ITx4pTransmitter Non-Inverted Data output7GNDGround18LVTLL-IModSelLModule Select9LVTLL-IResetLModule Reset10VccRx﹢3.3V Power Supply Receiver211LVCMOS-I/OSCL2-Wire Serial Interface Clock12LVCMOS-I/OSDA2-Wire Serial Interface Data13GNDGround14CML-ORx3pReceiver Non-Inverted Data Output15CML-ORx3nReceiver Inverted Data Output16GNDGround117CML-ORx1pReceiver Non-Inverted Data Output18CML-ORx1nReceiver Inverted Data Output19GNDGround120GNDGround121CML-ORx2nReceiver Inverted Data Output22CML-ORx2pReceiver Non-Inverted Data Output23GNDGround124CML-ORx4nReceiver Inverted Data Output125CML-ORx4pReceiver Non-Inverted Data Output26GNDGround127LVTTL-OModPrsLModule Present28LVTTL-OIntLInterrupt29VccTx 3.3 V Power Supply transmitter230Vcc1 3.3 V Power Supply231LVTTL-ILPModeLow Power Mode32GNDGround133CML-ITx3pTransmitter Non-Inverted Data Input34CML-ITx3nTransmitter Inverted Data Output35GNDGround136CML-ITx1pTransmitter Non-Inverted Data Input37CML-ITx1nTransmitter Inverted Data Output38GNDGround1 Notes:Module circuit ground is isolated from module chassis ground within the module. GND is the symbol for signal and supply (power) common for QSFP modules.The connector pins are each rated for a maximum current of 500mA.ModSelL Pin The ModSelL is an input pin. When held low by the host, the module responds to 2-wire serial communication commands. The ModSelL allows the use of multiple QSFP modules on a single 2-wire interface bus. When the ModSelL is “High”, the module will not respond to any 2-wire interface communication from the host. ModSelL has an internal pull-up in the module.ResetL Pin Reset. LPMode_Reset has an internal pull-up in the module. A low level on the ResetL pin for longer than the minimum pulse length (t_Reset_init) initiates a complete module reset, returning all user module settings to their default state. Module Reset Assert Time (t_init) starts on the rising edge after the low level on the ResetL pin is released. During the execution of a reset (t_init) the host shall disregard all status bits until the module indicates a completion of the reset interrupt. The module indicates this by posting an IntL signal with the Data_Not_Ready bit negated. Note that on power up (including hot insertion) the module will post this completion of reset interrupt without requiring a reset.LPMode Pin REALSEA QSFP SR4 operate in the low power mode (less than 1.5 W power consumption) This pin active high will decrease power consumption to less than 1W.ModPrsL Pin ModPrsL is pulled up to Vcc on the host board and grounded in the module. The ModPrsL is asserted “Low” when the module is inserted and deasserted “High” when the module is physically absent from the host connector.IntL Pin IntL is an output pin. When “Low”, it indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt by using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled up to Vcc on the host board.